A 1.8 mu W 60 nV/root Hz Capacitively-Coupled Chopper Instrumentation Amplifier in 65 nm CMOS for Wireless Sensor Nodes

作者：Fan Qinwen^*; Sebastiano Fabio; Huijsing Johan H; Makinwa Kofi A A

来源：IEEE Journal of Solid-State Circuits, 2011, 46(7): 1534-1543.

DOI：10.1109/JSSC.2011.2143610

• Bio-signal sensing
• chopping
• high power efficiency
• low offset
• low power
• precision amplifier
• wireless sensor nodes

This paper presents a low-power precision instrumentation amplifier intended for use in wireless sensor nodes. It employs a capacitively-coupled chopper topology to achieve a rail-to-rail input common-mode range as well as high power efficiency. A positive feedback loop is employed to boost its input impedance, while a ripple reduction loop suppresses the chopping ripple. To facilitate bio-potential sensing, an optional DC servo loop may be employed to suppress electrode offset. The IA achieves 1 mu V offset, 0.16% gain inaccuracy, 134 dB CMRR, 120 dB PSRR and a noise efficiency factor of 3.3. The instrumentation amplifier was implemented in a 65 nm CMOS technology. It occupies only 0.1 mm(2) chip area (0.2 mm(2) with the DC servo loop) and consumes 1.8 mu A current (2.1 mu A with the DC servo loop) from a 1 V supply.

• 出版日期2011-7