摘要

A new energy-efficient tunable pulse generator is presented in this paper using 0.13-mu m CMOS technology for short-range high-data-rate 3.110.6GHz ultra-wideband applications. A ring oscillator consisting of current-starved CMOS inverters is quickly switched on and off for the duration of the pulse, and the amplitude envelope is shaped with a variable passive CMOS attenuator. The variable passive attenuator is controlled using an impulse that is created by a low-power glitch generator (CMOS NOR gate). The glitch generator combines the falling edge of the clock and its delayed inverse, allowing the duration of the impulse to be changed over a wide range (500900ps) by varying the delay between the edges. The pulses generated with this technique can provide a sharp frequency roll off with high out-of-band rejection to help meet the Federal Communications Commission mask. The entire circuit operates in switched mode with a low average power consumption of less than 3.8mW at 910MHz pulse repetition frequency or below 4.2pJ of energy per pulse. It occupies a total area of 725x600 mu m2 including bonding pads and decoupling capacitors, and the active circuit area is only 360x200 mu m2.

  • 出版日期2013-2