A 12.77-MHz 31 ppm/degrees C On-Chip RC Relaxation Oscillator With Digital Compensation Technique

作者：Wang Jiacheng^*; Goh Wang Ling; Liu Xin; Zhou Jun

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2016, 63(11): 1816-1824.

DOI：10.1109/TCSI.2016.2593705

• Digital calibration
• frequency stability
• loop delay
• low power
• relaxation oscillator
• temperature coefficient

The design of a 12.77-MHz on-chip RC relaxation oscillator with digital compensation technique is presented. To maintain the frequency stability versus temperature and supply voltage variations, loop delay tuning by a digital feedback loop is developed in this system. In order to generate an on-chip reference for digital calibration, a replica comparator is added. The on-chip relaxation oscillator is fabricated in 0.18-mu m CMOS process. The measured output frequency variation is 31 ppm/degrees C across -30 to 120 degrees C temperature range after compensation. The frequency variation over the supply voltage from 0.6 V to 1.1 V is +/- 0.5%/V. The measured total power consumption is 56.2 mu Wat 0.9-V supply voltage when the digital compensation blocks are enabled. After digital compensation, the compensation blocks can be shutdown for power saving, and the main oscillator consumes only 12.8 mu W.

• 出版日期2016-11
• 单位南阳理工学院