A 0.15-mu m FD-SOI Substrate Bias Control SRAM with Inter-Die Variability Compensation Scheme

作者:Okumura Shunsuke*; Fujiwara Hidehiro; Yamaguchi Kosuke; Yoshimoto Shusuke; Yoshimoto Masahiko; Kawaguchi Hiroshi
来源:IEICE - Transactions on Electronics, 2012, E95C(4): 579-585.
DOI:10.1587/transele.E95.C.579

摘要

We propose a novel substrate-bias control scheme for an FD-SOI SRAM that suppresses inter-die variability. The proposed circuits detect inter-die threshold-voltage variation automatically, and then maximize read/write margins of memory cells to supply the substrate bias. We confirmed that a 486-kb 61 SRAM operates at 0.42 V, in which an FS corner can be compared as much as 0.14 V or more.

  • 出版日期2012-4

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