Disturb-Free Three-Dimensional Vertical Floating Gate NAND with Separated-Sidewall Control Gate

作者：Seo Moon Sik^*; Endoh Tetsuo

来源：Japanese Journal of Applied Physics, 2012, 51(2): 02BD04.

DOI：10.1143/JJAP.51.02BD04

Recently, the three-dimensional (3D) vertical floating gate (FG) type NAND cell arrays with the sidewall control gate (SCG) structure are receiving attention to overcome the reliability issues of charge trap (CT) type 3D NAND. In order to achieve the multilevel cell (MLC) operation for lower bit cost in 3D NAND, it is important to eliminate reliability issues, such as the V-th distribution with interference and disturbance problems and V-th shift with retention issues. In this paper, we intensively investigated the disturbance problems of the 3D vertical FG type NAND cell with separated-sidewall control gate (S-SCG) structure for the reliable MLC operation. Above all, we successfully demonstrate the fully suppressed disturbance problems, such as indirect programming of the unselected cells, hot electron injection of the edge cells and direct influence to the neighboring passing cells, by using the S-SCG with 30 nm pillar size.

• 出版日期2012-2