A 21%-Jitter-Improved Self-Aligned Dividerless Injection-Locked PLL With a VCO Control Voltage Ripple-Compensated Phase Detector

作者：Lee Dongil^*; Lee Taeho; Kim Young Ju; Kim Lee Sup

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2016, 63(8): 733-737.

DOI：10.1109/TCSII.2016.2530098

• Dividerless injection-locked phase-locked loop (PLL) (ILPLL)
• lock detector (LD)
• voltage-controlled oscillator (VCO) control voltage ripple compensation

This brief presents a 2-GHz dividerless injectionlocked phase-locked loop (PLL) (ILPLL) with a voltage-controlled oscillator (VCO) control voltage ripple-compensated phase detector (PD) (RICPD). The proposed lock detector (LD) can detect not only the frequency difference between VCO frequency and target frequency but also the coarse phase position. With the help of the LD, the RICPD has a simple architecture using AND gates, relieving mismatches in the PD and charge pump. Additionally, the RICPD improves the performance of phase noise by a ripple compensation technique and solves an UP/DN pulse mismatch problem of PLL with a simple structure. As a result, the proposed ILPLL improves jitter performance by 21% (471-fs integrated jitter from 1 kHz to 40 MHz). The test core fabricated in a 65-nm CMOS process consumes 6.2 mW.

• 出版日期2016-8