摘要

This letter presents the design of a low power, low phase noise monolithic oscillator with a back-end-of-line-embedded CMOS-MEMS resonator. The proposed CMOS-MEMS oscillator consists of a double-ended tuning fork resonator and a high gain (>138 dB Omega) ultra-low input-referred current noise (<25 fA/root Hz) integrator-differentiator transimpedance amplifier (TIA) with sub-150-mu W power consumption. The 1.2-MHz CMOS-MEMS oscillator prototype shows the phase noise better than -120 dBc/Hz at 1-kHz offset and -122 dBc/Hz at 10-kHz offset with moderate dc-bias (V-P = 22 V). The proposed oscillator can be operated with reduced MEMS dc bias (V-P < 7 V) and TIA power supply (V-DD < 1.3 V, 65 mu W) while maintaining satisfactory performance. The frequency-power-normalized oscillator phase noise figure-of-merit (will be defined later) of 190 dB is achieved at 1-kHz offset with a resonator Q of 1900, which is comparable with the state-of-the-art using bulk-mode resonators possessing Q > 100 k.