摘要

Output phase noise for edge-combining delay-locked loops (DLLs) is derived in this study, which is obtained by decomposing the synthesized output waveform into a noise-free signal and a corresponding noise perturbation on it. The noise-free signal, which is affected by the systematic errors as the phase offset between phase detector inputs or delay mismatches among delay cells, possesses a periodic steady-state solution, and therefore leads to output spur. The noise perturbation, on the other hand, will be upconverted to the frequency-multiplied output based on this solution. A general analysis approach is provided that can be applied to the case such as the change of the frequency multiplication factor or the variation of the output duty cycle. The theory is verified by a programmable edge-combining DLL, which has been realized in a CMOS 90-nm technology. The predicted output phase noise has close agreement with simulation results, as well as the measurement data when the frequency multiplication factor changes.

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