摘要

A novel process for silicon single electron transistors (Si-SET) is presented, combining chemical mechanical polishing (CMP) with the advantages of silicon processing. To eliminate effects caused by random distribution of dopants in the island, The Si-SET's doped-Si island is replaced with an aluminum or tantalum island by integrating a metal CMP technique with our nano-encapsulation process. The fabricated hybrid Al-island Si-SET has similar to 10 nm silicon on insulator lines as the source and drain leads. It shows characteristic Coulomb blockade oscillations with a charging energy of similar to 4 meV. The fabrication results demonstrate the scalability of the SET island and the tunnel junction size in a manufacturable top-down approach.

  • 出版日期2011-11