摘要

This paper presents a compact 0.18-mu m CMOS wideband gain-flattened low noise amplifier (LNA). The low noise characteristic of the LNA is achieved by the noise canceling technique and the gain flatness is enhanced by the gate-inductive gain-peaking technique. In addition to extending flat-gain bandwidth, the proposed gain-peaking technique results in better wideband noise canceling and quick gain roll-off outside the desired signal band to reject interference. Without using any passive inductor, the core size of the fully-integrated CMOS LNA circuit is only 145 mu m 247 mu m. The measured gain and noise figure of the CMOS LNA are 16.4 dB and 2.1 dB, respectively. The gain variation of the LNA is +/- 0.4 dB from 50 to 900 MHz. Operated at 1.8 V, the chip consumes 14.4 mW of power.