摘要

In time-interleaved analog-to-digital converter (ADC) architecture, offset mismatch, gain mismatch, and timing error between channels degrade the performance of time-interleaved ADCs. This paper focuses on the timing error, and proposes a simple calibration algorithm based on Hilbert transform estimate and then correct the timing error. With a cosine input, it could efficiently and accurately estimate the timing error. Fractional delay filters are developed to correct the timing errors. This simplifies the design and decreases the cost. Numerical simulations are used to verify the proposed estimation and correction algorithm.