摘要

Gallium nitride high electron mobility transistor has been seen as a power semiconductor devices with lots of potential since it has been commercialized. However, the advantages of fast switching speed with low conduction resistance always have to compromise to the fast switching on evoked overvoltage. Though it has been realized that the overvoltage problem arises from the joint effect of fast switch speed and parasitics, there is a lack of ways for quantitative analysis. This paper proposes a reliable circuit model based on a quantitative way to analyze the cause of overvoltage and finds optimized parameters to suppress. A normalized method is adopted to make the analysis more general, and the voltage and current stress determined safe operation area during the switching ON process under the constraint of maximum overvoltage is detailed. The analysis is verified by a double pulse test experiment, with the calculated and measured maximum overvoltage matching very well. The analysis can help us to choose reasonable turn-ON speed and power loop parasitic inductance before the printed circuit board (PCB) manufacture with an acceptable maximum overvoltage guaranteed.