A 65-nm CMOS Constant Current Source With Reduced PVT Variation

作者：Wang Dong^*; Tan Xiao Liang; Chan Pak Kwong

来源：IEEE Transactions on Very Large Scale Integration Systems, 2017, 25(4): 1373-1385.

DOI：10.1109/TVLSI.2016.2633566

• Current reference
• line sensitivity
• process tracking
• temperature compensation
• threshold voltage (VTH) circuit

This paper presents a new nanometer-based low-power constant current reference that attains a small value in the total process-voltage-temperature variation. The circuit architecture is based on the embodiment of a process-tolerant bias current circuit and a scaled process-tracking bias voltage source for the dedicated temperature-compensated voltage-to-current conversion in a preregulator loop. Fabricated in a UMC 65-nm CMOS process, it consumes 7.18 mu W with a 1.4 V supply. The measured results indicate that the current reference achieves an average temperature coefficient of 119 ppm/degrees C over 12 samples in a temperature range from -30 degrees C to 90 degrees C without any calibration. Besides, a low line sensitivity of 180 ppm/V is obtained. This paper offers a better sensitivity figure of merit with respect to the reported representative counterparts.

• 出版日期2017-4
• 单位南阳理工学院