A 6-GHz Built-in Jitter Measurement Circuit Using Multiphase Sampler

作者:Cheng, Kuo-Hsing*; Liu, Jen-Chieh; Huang, Hong-Yi; Li, Yu-Liang; Jhu, Yong-Jhen
来源:IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2011, 58(8): 492-496.
DOI:10.1109/TCSII.2011.2158753

摘要

This brief presents a 6-GHz built-in jitter measurement (BIJM) with the time amplifier (TA) and the multiphase sampler (MPS) to achieve a 1-ps timing resolution. The proposed MPS can reduce the area, and the TA can extend the total timing resolution of BIJM. The self-referenced circuit with the autocalibration technique can eliminate the process variations and create a reference clock being a sampled signal. Using the calibration technique, the gain variation of TA and the timing resolution variation of MPS can be aligned to achieve a 1-ps timing resolution. The sense amplifier delay flip-flop uses the bulk input to reduce the measured error. The BIJM is fabricated by a 90-nm CMOS process. The core area of BIJM is 130 mu m x 200 mu m, and the power consumption is 20.4 mW with the I/O buffers.