A low power direct conversion receiver RF front-end with high in-band IIP2/IIP3 and low 1/f noise

作者：Chi Baoyong^*; Han Shuguang; Wang Zhihua

来源：Analog Integrated Circuits and Signal Processing, 2011, 67(2): 131-136.

DOI：10.1007/s10470-010-9562-9

• Integrated circuits
• Radio frequency circuits
• Wireless receiver
• CMOS
• High linearity
• Low power

A low power direct-conversion receiver RF front-end with high in-band IIP2/IIP3 and low 1/f noise is presented. The front-end includes the differential low noise amplifier, the down-conversion mixer, the LO buffer, the IF buffer and the bandgap reference. A modified common source topology is used as the input stages of the down-conversion mixer (and the LNA) to improve IIP2 of the receiver RF front-end while maintaining high IIP3. A shunt LC network is inserted into the common-source node of the switching pairs in the down-conversion mixer to absorb the parasitic capacitance and thus improve IIP2 and lower down the 1/f noise of the down-conversion mixer. The direct-conversion receiver RF front-end has been implemented in 0.18 A mu m CMOS process. The measured results show that the 2 GHz receiver RF front-end achieves +33 dBm in-band IIP2, 21 dB power gain, 6.2 dB NF and -2.3 dBm in-band IIP3 while only drawing 6.7 mA current from a 1.8 V power supply.

• 出版日期2011-5
• 单位清华大学