An 8-bit, 10 kHz, 5.1 mu W, 0.18 mu m CMOS SAR ADC for RFID applications with sensing capabilities

作者：Marjonen J^*; Vermesan O; Rustad H

来源：Analog Integrated Circuits and Signal Processing, 2011, 66(3): 389-405.

DOI：10.1007/s10470-010-9527-z

• ADC
• Micro power
• RFID
• Wireless sensor network
• Noise

An 5.1 mu W, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 kHz clock was designed and fabricated in a 0.18 mu m CMOS technology for passive UHF radio frequency identification (RFID) applications. The ADC utilises a resistive digital to analog converter (DAC). The ADC can operate with low power consumption. The proposed comparator with cascode active load can offer large gain and can operate at a low supply voltage. The measured total power consumption is 5.1 mu W at a 10 kHz input clock with a 1.8 V single supply, and 0.5 mu W with 970 mV supply.

• 出版日期2011-3