Dependence of DC Parameters on Layout and Low-Frequency Noise Behavior in Strained-Si nMOSFETs Fabricated by Stress-Memorization Technique

作者：Huang Yao Tsung^*; Wu San Lein; Chang Shoou Jinn; Kuo Cheng Wen; Chen Ya Ting; Cheng Yao Chin; Cheng O**ert

来源：IEEE Electron Device Letters, 2010, 31(5): 500-502.

DOI：10.1109/LED.2010.2044477

• Layout geometry
• low frequency
• stress-memorization technique (SMT)
• unified model

The impact of stress-memorization technique (SMT)-induced tensile strain on the layout dependence of nMOSFET characteristics is investigated. It is found that the incorporation of the SMT process provides up to 12% improvement in transconductance and 9% enhancement in ON-state current for nMOSFETs with a source/drain length (L(S/D)) of 1.76 mu m and W = 0.5 mu m. The characteristics of the SMT device become more sensitive to the layout geometry as L(S/D) and W are down to 0.5 and 0.25 mu m, respectively. Moreover, low-frequency measurements reveal that the interface quality of the SMT device is the same as that of the control devices. Furthermore, it is found that the mechanism of 1/f noise in the SMT device can be properly interpreted by the unified model.

• 出版日期2010-5