摘要
A 6-bit passive phase shifter for 2.5- to 3.2-GHz frequency band has been designed and implemented in a standard 0.18-mu m CMOS technology. A new switched-network topology has been proposed for implementing the 5.625 degrees phase shift step. The insertion loss of the circuit is compensated with an on-chip bidirectional amplifier. The measured return losses of the circuit are better than 8 dB with output 1-dB compression point of +9.5 dBm in the transmit mode and noise figure of 7.1 dB in the receive mode. The fabricated phase shifter demonstrates an average rms phase error of less than 2 degrees over the entire operation bandwidth, which makes it suitable for high-precision applications.
- 出版日期2010-12