A 76-to 81-GHz Multi-Channel Radar Transceiver

作者:Fujibayashi Takeji; Takeda Yohsuke; Wang Weihu; Yeh Yi Shin; Stapelbroek Willem; Takeuchi Seiji; Floyd Brian
来源:IEEE Journal of Solid-State Circuits, 2017, 52(9): 2226-2241.
DOI:10.1109/JSSC.2017.2700359

摘要

This paper presents a packaged 76- to 81-GHz transceiver chip implemented in SiGe BiCMOS for both long-range and short-range automotive radars. The chip contains a two-channel transmitter (TX), a six-channel receiver (RX), a local-oscillator (LO) chain, and built-in self-test (BIST) circuitry. Each transmit channel includes multiple variable-gain amplifiers and a two-stage power amplifier. Measured on-die output power per channel is +18 dBm at 25 degrees C, decreasing to +16 dBm at 125 degrees C. Each receive channel includes a current-mode mixer, followed by intermediate-frequency buffers. At 25 degrees C, measured on-die noise figure is 10-11 dB, conversion gain is 14-15 dB, and input 1-dB compression point exceeds +1 dBm. An integrated LO chain drives the transmit and receive chains and includes an 18.5- to 20.6-GHz voltage-controlled oscillator connected to cascaded frequency doublers and a divide-by-four prescaler. At 25 degrees C, measured phase noise is -100 dBc/Hz at 1-MHz offset from a 77-GHz carrier. Integrated BIST circuits enable the measurement of signal power, RX gain, channel-to-channel phase, and internal temperature. The chip is flip-chip packaged into a ball-grid array and extracted interconnect loss for the package is 1.5 to 2 dB. Total power consumption for the chip is 1.8 W from 3.3 V for a single-TX, six-RX mode.

  • 出版日期2017-9