摘要

Engineering design is usually a daunting optimization task which often involving time-consuming, even computation-prohibitive process. Variable fidelity metamodeling has been developed as an efficient approach to alleviate this issue, owing to its capacity of achieving accurate metamodels within limited sample size. An output mapping modeling method is proposed in this paper as an alternative variable fidelity metamodeling method in which the low fidelity outputs is directly mapped to the high fidelity outputs through least square support vector regression. Furthermore, a nested Latin hypercube design method is developed for the output mapping modeling, in which a simple sampling design is treated as a building block or DOE seed to be translated and propagated through the design space, resulting in a final sampling configuration. Effectiveness of the proposed method are demonstrated by several numerical functions and two engineering design problem, in which different sample sizes, predictive accuracies and robustness are considered.