A 5.5-mW+9.4-dBm IIP3 1.8-dB NF CMOS LNA Employing Multiple Gated Transistors With Capacitance Desensitization

作者：Jin Tae Hwan^*; Kim Tae Wook

来源：IEEE Transactions on Microwave Theory and Techniques, 2010, 58(10): 2529-2537.

DOI：10.1109/TMTT.2010.2063790

• Harmonic feedback
• linearity
• low-noise amplifier (LNA)
• multiple gated transistors (MGTRs)
• third-order intercept point (IIP3)

A capacitance desensitization technique is proposed for a multiple gated transistors amplifier with source degeneration to relax second-order distortion contribution to a third-order intermodulation distortion (IMD3), as well as an induced-gate noise contribution to noise figure. An extra capacitance, which is added between gate and source nodes of input transistors in a parallel manner, can desensitize the contribution of second-order harmonic feedback to IMD3. The capacitance is useful for optimizing noise figure, as well by controlling the input matching network quality factor (Q), which can desensitize the induced-gate noise contribution to noise figure. The low-noise amplifier is implemented with the proposed technique using 1P6M 0.18-mu m CMOS technology for 900-MHz code division multiple access (CDMA) receivers. It shows a third-order intercept point of +9.4 dBm and noise figure of 1.8 dB while consuming 5.5 mW at 1.5 V.

• 出版日期2010-10