摘要
A simultaneous dual-band dual-waveform frequency synthesizer suitable for radar applications is presented. By using a K-band integer-N phase-locked loop (PLL) in conjunction with a W-band frequency modulation loop, a K-band sinusoidal carrier and W-band frequency-modulated continuous-wave frequency chirp can be generated concurrently. Due to the single PLL architecture for dual-band signal generation, additional loop filter, phase frequency detector, and dividers are no longer required for reduced chip area and power consumption. Fabricated in a 90-nm CMOS process, the proposed circuit occupies an area of 1.26 mm x 1.675 mm and consumes a dc power of 67 mW from a supply voltage of 1.2 V.
- 出版日期2018-5
- 单位中国科学院电工研究所