A Low?power Intermediate Frequency Signal Processing Circuit for 24 GHz Millimeter Wave Radar System [一种应用于24 GHz毫米波雷达系统的低功耗中频信号处理电路]

作者：Feng K.; Shi C.^*; Zhang X.; Chen G.; Zhang R.

来源：Research & Progress of Solid State Electronics, 2022, 42(5): 363-370.

• Active?RC integrator
• Analog baseband
• Dynamic comparator
• Intermediate frequency signal
• Mm?wave radar
• Passive summing circuit
• Sigma?Delta modulator

An intermediate frequency (IF) signal processing circuit for the 24 GHz dual-mode mm-wave automotive radar transceiver system was introduced in this paper, including analog baseband (ABB) and sigma-delta modulator (DSM). In the ABB, two Tow-Thomas second-order sections cascaded to form a low-pass filter to filter and amplify the IF signal. At the same time, a current injection-type DC offset cancellation (DCOC) circuit was integrated to eliminate the DC offset that existed when the IF signal was input. The sigma-delta modulator quantized the baseband-processed IF signal into a one-bit digital code stream. The modulator's structure was a single loop feedforward single-bit quantization type and four integrators were implemented by Active-RC filter. Also, local-feedback resistors were used to improve the in-band noise shaping effect. In order to save power consumption, feedforward structure, passive summing circuit and dynamic comparator were adopted at the same time. The overall radar transceiver system chip was designed based on 55 nm CMOS process, and the IF signal processing circuit of this paper was tested. The test results show that the circuit consumes 13 mW of power consumption, the gain range covers 0?60 dB, the 3 dB bandwidth is greater than 160 kHz, and when the sampling clock frequency is 40 MHz, a spurious-free dynamic range (SFDR) of 67.5 dB can be obtained under 8 kHz input condition and a spurious-free dynamic range of 63.9 dB can be obtained under 160 kHz input condition.

• 出版日期2022
• 单位华东师范大学