摘要
In this work, a behavioral model for MOS Controlled-Thyristor (MCT) surge current analysis is proposed together with a design criterion. In this model, the relationships between the surge current characteristics including peak current (I-peak) and high current rising rate (di/dt) of MCT and the device resistance (R) have been discussed, and then a readily measurable parameter, critical resistance (R-c), is presented to estimate the device surge current capability. According to the analytical results, both I-peak and di/dt of MCT have been found to remain approximately constant with increasing resistance unless its resistance approaches and exceeds this R-c. It is therefore referred to as a design criterion for guiding the device design. The accuracy of the developed model and criterion are verified by comparing the obtained results with those resulting from simulation and experiment results.