摘要

In this paper we present an analytical model for Gate All Around (GAA) MOSFET non-volatile memory devices having nanocrystal embedded multilayer gate dielectric. We considered an undoped long channel GAA MOSFET with a surround gate configuration, having a multilayer SiO2 (5 nm) - Si/Au nc embedded SI3N4 (6 nm) - SiO2 (7 nm) gate dielectric. From the cylindrical Poisson equation and Gauss%26apos;s Law, the potential and the electric fields in the different layers of the gate oxide stack were derived. The MOSFET characteristics were modeled following a rigorous surface potential based analytical method. Thereafter, using a Wentzel-Kramers-Brillouin (WKB) approximation based model, the direct tunneling and the Fowler-Nordheim (F-N) tunneling currents {responsible for nanocrystal charging (write) and discharging (erase) mechanisms in such a device}, were evaluated. From our model we also obtained the transient programming-erasing characteristics, the threshold voltage shifts due to nanocrystal charging, and the output characteristics of the MOSFET non-volatile memory. The impact of the choice of nanocrystal (Si/Au) on the device performance was also investigated. From the studies, the nc embedded devices showed better performance than the conventional SONOS DGMOS NVM. Among the two ncs compared the nc-Au embedded GAA MOSFET NVM device emerged as the better performer in terms of higher charge density, faster charging, higher threshold voltage shift and better charge retention. The theoretical results obtained from our model were finally discussed in the light of recent experimental reports.

  • 出版日期2012-7