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摘要
A 3-25 Gb/s four-channel receiver with noise-canceling transimpedance amplifiers and power-scalable limiting amplifiers is presented. It is fabricated in a 40-nm CMOS process. Each channel provides an overall gain of 64 dB center dot Omega. The measured input integrated noise is 2.7 mu A(rms), and the measured bit error rate is < 10(-12) for a 25-Gb/s pseudorandom bit sequence of 2(7) - 1. The power consumption is 103 mW per channel from a 1.3-V supply. The total area is 1.16 mm(2).
- 出版日期2014-11
- 单位中国科学院电工研究所
