摘要

An ultra-wideband (UWB) active true time-delay circuit with a differential tunable active inductor for LC-tank is presented and fabricated in a 0.18 mu m CMOS process. The proposed delay circuit consists of a transistor, a differential active inductor (DAI), a resistor and a load, which can be approximated by a second-order all-pass filter as the basic delay element to improve the delay resolution in UWB beam-forming timed array and also be used as the hardware delay to enhance the handling speed in high-speed parallel signal processing. A novel DAI using the g (m)-boosting and the negative impedance transformation techniques is designed to improve delay precision and bandwidth. The proposed active delay circuit is realized without any passive inductors, which can reduce the chip area and fabricated cost. Within 3-12 GHz, the measured group delay is tunable from 6 to 8.5 ps with < 10% variation and gain fluctuation is kept within 0.5 dB. The chip experimentally demonstrates an input 1-dB compression point of 14.6 dBm and consumes 12 mW from a 1.8-V supply. The core area is only 85 mu m x 45 mu m due to the absence of the spiral inductor. To the authors' best knowledge, this work is firstly published that the second-order allpass filter using active inductor has the picosecond-delay time in silicon-based GHz frequency range.