Average latency and link utilization analysis of heterogeneous wormhole NoCs

作者：Ben Itzhak Yaniv^*; Cidon Israel; Kolodny Avinoam

来源：Integration, the VLSI Journal, 2015, 51: 92-106.

DOI：10.1016/j.vlsi.2015.07.002

• Heterogeneous networks-on-chip
• Analysis methodology
• Delay evaluation
• Link utilization evaluation

We present a novel methodology for analysis of the average end-to-end latency and link utilization of wormhole NoCs with heterogeneous link capacities and heterogeneous number of virtual channels per unidirectional link. Our analysis methodology supports different heterogeneous NoC topologies for which no analysis framework has been developed in the past. The average end-to-end latency per flow is separated to three components: (1) The time it takes the head-flit to leave the source queue (queuing time at the source); (2) The time it takes the head-flit to reach the destination module (path acquisition time) and (3) The time it takes the rest of the packet to leave the network (transfer time). Furthermore, we take into account the interaction between intersecting flows. The average link utilization is calculated based on the path acquisition time and transfer time. To that end, our analysis introduces a set of implicit equations, which can be efficiently solved iteratively. We demonstrate the accuracy and the efficiency of our approximate analysis by comparing the analysis results to accurate simulations for several synthetic examples and SoC multimedia applications in heterogeneous networks. In addition, we compare the analysis results with HNOCS simulation results for a chip-multi-processor (CMP) using SPLASH-2 and PARSEC traces for both homogeneous and heterogeneous NoC configurations.

• 出版日期2015-9