A 2 GHz 244 fs-Resolution 1.2 ps-Peak-INL Edge Interpolator-Based Digital-to-Time Converter in 28 nm CMOS

作者：Sievert Sebastian; Degani Ofir; Ben Bassat Assaf; Banin Rotem; Ravi Ashoke^*; Thomann Wolfgang; Klepser Bernd Ulrich; Boos Zdravko; Schmitt Landsiedel Doris

来源：IEEE Journal of Solid-State Circuits, 2016, 51(12): 2992-3004.

DOI：10.1109/JSSC.2016.2592620

• Digital-to-phase converter
• digital-to-time converter
• DNL
• DPC
• DTC
• edge interpolator
• INL
• phase interpolator
• PI

This paper presents a 2 GHz digital-to-time converter (DTC) with 244 fs time resolution. The DTC consists of a multi-modulus divider (MMD) and a phase interpolator (PI) as coarse and fine tuning blocks, respectively. Control logic is implemented to prevent shoot-through current during the interpolation process in order to linearize the PI. The measured DTC's peak integral nonlinearity (INL) is 1.2 ps and limited by the PI. The interpolation process is analyzed in detail, describing the root cause of the nonlinearity and indicating key parameters to improve it. Furthermore, a measurement method for DTCs is presented that enables femtosecond accuracy. The DTC has been implemented in standard 28 nm CMOS technology.

• 出版日期2016-12