Hierarchical motion estimation algorithms with especially low hardware costs

作者：Lu Y^*; Yong Z; Yao QD

来源：IEEE Transactions on Consumer Electronics, 1998, 44(1): 125-129.

DOI：10.1109/30.663738

• hierarchical motion estimation
• MPEG-2
• video signal processor(VSP)

Digital Signal Processor (DSP) or Video Signal Processor (VSP) are becoming popular solution for video encoding because of its flexibility comparing with special purpose chip. The less hardware costs an algorithm required, the better the algorithm is. Computational complexity, requirement of on-chip memory size, amount of data fetch and times of data fetch are the measurements for encoding algorithms.
Considering of that, a large-scale-subsample (4:1 horizontally and vertically subsampling) hierarchical motion estimation algorithm (LSS-HME) is proposed. It can be implemented with less hardware resources. In order to improve estimation performance the relativity of motion vector field is exploited. The peak signal-to-noise ratio (PSNR) degradation of reconstructed image is limited to about 0.1 dB compared with full search (FS) algorithm.
By using the simple motion estimation algorithm described in this paper, MPEG-2 MP@ML or even higher layers can be implemented on the mainstream video signal processor with quite good performance.

• 出版日期1998-2
• 单位浙江大学