MESIP: A Configurable and Data Reusable Motion Estimation Specific Instruction-Set Processor

作者：Kim Sung Dae^*; Sunwoo Myung Hoon

来源：IEEE Transactions on Circuits and Systems for Video Technology, 2013, 23(10): 1767-1780.

DOI：10.1109/TCSVT.2013.2268992

• Application-specific instruction-set processor (ASIP)
• configurable architecture
• low-power design
• motion estimation/motion compensation (ME/MC)
• search scan order

This paper proposes a new motion estimation (ME)-specific instruction-set processor (MESIP) with a novel search scan order with high data reusability, to efficiently implement various advanced ME algorithms. The proposed ME-specific instructions can be selectively used for ME algorithms. The novel data-reusing search scan order, called center biased search scan (CBSS), exploits the symmetry of the search pattern to reduce redundant data loading on MESIP by about 26.9% and 16.1% compared with raster scan and snake scan, respectively. MESIP has been implemented with IBM%26apos;s 90-nm CMOS technology and has 203K gates excluding memory. Simulation results show that the proposed MESIP can reduce the number of required instructions by up to 18.9% compared with existing ME processors. Moreover, MESIP achieves comparable performance even with ME ASICs and hence may be quite suitable for a low-power and high-performance ME implementation.

• 出版日期2013-10