New Josephson-CMOS Interface Amplifier

作者：Wei Daniel^*; Whiteley Stephen R; Zheng Lizhen; Park Heejoung; Kim Hoki; Van Duzer Theodore

来源：IEEE Transactions on Applied Superconductivity, 2011, 21(3): 805-808.

DOI：10.1109/TASC.2010.2088358

• CMOS memory integrated circuits
• hybrid integrated circuits
• Josephson amplifiers
• Josephson junctions
• random access memories

High-speed amplification fromJosephson-level digital signals of a few millivolts to the volt levels employed in CMOS devices is optimally done in two stages. For the first stage we use a Josephson circuit which amplifies a few-millivolt input to several tens of millivolts. This drives a CMOS digital amplifier. The CMOS amplifier must be calibrated to compensate for random threshold voltage variations in the fabrication process; the design of a digital calibration circuit is included. Simulations of the calibrated amplifier at 300 K show a digital output of 1.8 V with a delay of 70-90 ps when fabricated in a 65 nm CMOS process. Simulations for 4 K will yield better results and are in progress.

• 出版日期2011-6