摘要

The performance prediction of double-walled carbon nanotube (DWCNT) array-built field-effect transistors (DWCNTFETs) is performed theoretically. The charge densities and surface potentials of double walls are solved in a self-consistent manner with the effects of wall screening among the DWCNT array treated appropriately. Some comparisons are made between our method and the nonequilibrium Green's function approach, with good agreement obtained. The influences of phonon scattering, doping resistances, Schottky barrier resistances, screening effects, and parasitic capacitances on DWCNTFET performance are examined in detail for different array geometries. It is found that, although its intrinsic channel part has no speed advantage over the single-walled counterpart, the overall speed performance can be better with low array densities and large diameters of the DWCNTs. The delay and cutoff frequency of the DWCNTFET can be decreased by 15% and increased by 30%, respectively. In particular, its better ON current property can be utilized in the design of nanodevices with high-power-handling capability.