A 5 MHz integrated digital DC-DC converter with a delay-line ADC and a Sigma-Delta DPWM

作者：Wang Hongyi^*; Hu Xi; Wang Shizhen; Zhao Gangdong; Luo Dongzhe

来源：IEICE Electronics Express, 2013, 10(6): 20130124.

DOI：10.1587/elex.10.20130124

• DC-DC converter
• digital PID control
• delay-line ADC
• Sigma-Delta modulator
• DLL

An integrated digital buck DC-DC converter based on a 0.5 mu m standard CMOS process is presented in this paper. Its switching frequency is 5 MHZ and no extra high frequency clock is needed. The delay-line ADC with a self-calibration loop utilized in the converter has low sensitivity to the process, voltage, temperature and loading (PVTL). The DPWM in the proposed DC-DC converter employs a first-order Sigma-Delta modulator to achieve an equivalent resolution of 10-bit. The simulation results show that the proposed DC-DC converter can operate at the supply voltage range of 2.7 to 3.6 V with a transient response time of 30 mu s. The peak efficiency reaches 94%.

• 出版日期2013
• 单位西安交通大学