A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets

作者：Li, Yuanqing; Li, Lixiang^*; Ma, Yuan; Chen, Li; Liu, Rui; Wang, Haibin; Wu, Qiong; Newton, Michael; Chen, Mo

来源：Journal of Electronic Testing-Theory and Applications, 2016, 32(2): 137-145.

DOI：10.1007/s10836-016-5573-5

• Alpha particle
• Proton
• Single event upset (SEU)
• Soft error rate (SER)
• SRAM

A novel SRAM cell tolerant to single-event upsets (SEUs) is presented in this paper. By adding four more transistors inside, the proposed circuit can obtain higher critical charge at each internal node compared to the conventional 6-transistor (6T) cell. Arrays of 2k-bit capacitance of these two designs were implemented in a 65 nm CMOS bulk technology for comparison purpose. Radiation experiments showed that, at the nominal 1.0 V supply voltage, the proposed cell achieves 47.1 % and 49.3 % reduction in alpha and proton soft error rates (SER) with an area overhead of 37 %.

• 出版日期2016-4
• 单位中国石油大学（北京）; Saskatoon; Saskatchewan