A Symmetric, Multi-Threshold, High-Speed and Efficient-Energy 1-Bit Full Adder Cell Design Using CNFET Technology

作者：Mehrabani Yavar Safaei^*; Eshghi Mohammad

来源：Circuits, Systems, and Signal Processing, 2015, 34(3): 739-759.

DOI：10.1007/s00034-014-9887-1

• Carbon nanotube field effect transistor (CNFET)
• High-performance
• Multi-threshold
• Nanoelectronics
• Symmetric full adder

This paper presents two asymmetric and symmetric multi-threshold, high-speed, and energy-efficient Full Adder cells using Carbon Nanotube Field Effect Transistors (CNFETs). The utilization of unique properties to CNFETs to build structures inaccessible to MOSFETs technology is also evoked, particularly due to geometry-dependent threshold voltages ( in multiple- designs to achieve high-performance circuits. In order to evaluate the proposed designs, computer simulations are carried out using 32 nm-CMOS and 32 nm-CNFET technologies. Comprehensive experiments are performed to evaluate the performance of the proposed designs using different low voltage power supplies, load capacitors, frequencies, and temperatures. Simulation results demonstrate the superiority of the proposed designs in terms of delay and power-delay product compared to the other classical and state-of-the-art CMOS and CNFET-based Full Adder cells. Moreover, in order to evaluate the robustness of the proposed symmetric cell against the variations and mismatches of both diameter of the CNTs and capacitance of input capacitors, Monte Carlo transient analysis has been carried out. Simulation results confirm that the proposed cell is robust against the mentioned fluctuations.

• 出版日期2015-3