Analysis and implementation of an interleaved series input parallel output active clamp forward converter

作者：Chen Shin Ju^*; Yang Sung Pei; Cho Meng Fu

来源：IET Power Electronics, 2013, 6(4): 774-782.

DOI：10.1049/iet-pel.2011.0438

A novel dual active clamp forward topology with interleaved series input parallel output (ISIPO) structure is proposed here. The ISIPO active clamp forward converter enables the converter cells to share the input voltage and output current. The interleaved operation can diminish the output current ripple in the output capacitor. The output capacitance of switching devices and the resonant inductance are utilised to realise the resonance at the transition interval of switches such that the zero-voltage-switching operation for all switches can be achieved. Moreover, the energy stored in the transformer leakage inductance is recycled such that the voltage stresses of switching devices are reduced. All these features make the proposed converter suitable for the DC-DC converters with high input voltage, high output current and high-efficiency applications. The operating principle and design considerations are provided in detail. Finally, experimental results based on a 240 W(12 V/20 A) prototype with an input voltage of 400 V are presented to verify the theoretical analysis and circuit performance.

• 出版日期2013