A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element

作者：Dhanasekaran Vijay^*; Gambhir Manisha; Elsayed Mohamed M; Sanchez Sinencio Edgar; Silva Martinez Jose; Mishra Chinmaya; Chen Lei; Pankratz Erik J

来源：IEEE Journal of Solid-State Circuits, 2011, 46(3): 639-650.

DOI：10.1109/JSSC.2010.2099893

• analog-to-digital conversion
• ADC
• baseband ADC
• continuous time
• deep-submicron CMOS
• delta-sigma modulator
• low OSR
• nanometric CMOS
• oversampling
• time-to-digital converter
• TDC
• time domain
• time-to-digital

A third-order CT Delta Sigma ADC that replaces the multi-bit quantizer and feedback DAC by a pulsewidth modulation (PWM) generator and time-to-digital converter (TDC) is implemented in 65 nm CMOS technology. The TDC provides a 50-level binary output code and a time-quantized feedback pulse to the modulator. It is shown that the TDC can achieve 11 bit linearity in time steps without calibration or dynamic element matching. The modulator achieves 68 dB DR in 20 MHz BW, consumes 10.5 mW and occupies 0.15 mm(2).

• 出版日期2011-3