A 0.7 V, 40 nW Compact, Current-Mode Neural Spike Detector in 65 nm CMOS

作者：Yao Enyi; Chen Yi; Basu Arindam^*

来源：IEEE Transactions on Biomedical Circuits and Systems, 2016, 10(2): 309-318.

DOI：10.1109/TBCAS.2015.2432834

• Action potential
• low power
• neural recording
• nonlinear energy operator (NEO)
• spike detection

In this paper, we describe a novel low power, compact, current-mode spike detector circuit for real-time neural recording systems where neural spikes or action potentials (AP) are of interest. Such a circuit can enable massive compression of data facilitating wireless transmission. This design can generate a high signal-to-noise ratio (SNR) output by approximating the popularly used nonlinear energy operator (NEO) through standard analog blocks. We show that a low pass filter after the NEO can be used for two functions-(i) estimate and cancel low frequency interference and (ii) estimate threshold for spike detection. The circuit is implemented in a 65 nm CMOS process and occupies 200 mu m x 150 mu m of chip area. Operating from a 0.7 V power supply, it consumes about 30 nW of static power and 7 nW of dynamic power for 100 Hz input spike rate making it the lowest power consuming spike detector reported so far.

• 出版日期2016-4
• 单位南阳理工学院