A 6 mW, 5,000-Word Real-Time Speech Recognizer Using WFST Models

作者：Price Michael^*; Glass James; Chandrakasan Anantha P

来源：IEEE Journal of Solid-State Circuits, 2015, 50(1): 102-112.

DOI：10.1109/JSSC.2014.2367818

• CMOS digital integrated circuits
• speech recognition
• weighted finite-state transducers (WFST)
• Gaussian mixture models (GMM)
• low-power electronics

We describe an IC that provides a local speech recognition capability for a variety of electronic devices. We start with a generic speech decoder architecture that is programmable with industry-standard WFST and GMM speech models. Algorithm and architectural enhancements are incorporated in order to achieve real-time performance amid system-level constraints on internal memory size and external memory bandwidth. A 2.5 x 2.5 mm test chip implementing this architecture was fabricated using a 65 nm process. The chip performs a 5,000 word recognition task in real-time with 13.0% word error rate, 6.0 mW core power consumption, and a search efficiency of approximately 16 nJ per hypothesis.

• 出版日期2015-1
• 单位MIT