High performance non-volatile memory with the control of charge trapping states in an amorphous InSnZnO active channel

作者：Cam Phu Thi Nguyen^*; Thanh Thuy Trinh; Raja Jayapal; Anh Huy Tuan Le; Jang Kyungsoo; Lee Youn Jung; Yi Junsin

来源：Semiconductor Science and Technology, 2015, 30(7): 075009.

DOI：10.1088/0268-1242/30/7/075009

• non-volatile memory
• InSnZnO active layer
• low interface trap density

In this study, the influence of interface states between an indium tin zinc oxide (ITZO) active layer and a gate insulator on memory characteristics was examined as a function of annealing temperature. The annealing nonvolatile memory (NVM) devices have shown the best electrical characteristics such as high field effect mobility (27.22 cm(2) V-1 s(-1)), low threshold voltage (0.15 V), low subthreshold slope (0.17 V dec(-1)), and high on/off current ratio (7.57 x 10(7)) in comparison with as-deposited devices. By annealing at 250 degrees C, the number of ITZO/insulator interface trap densities was reduced. The effect of the remaining trap states on the retention characteristic of memory devices is negligible. The performance of NVM devices using different annealing temperatures of ITZO and a multi-stack gate insulator SiO2/SiOx/SiOxNy with Si-rich SiOx for the charge storage layer was also reported. The 250 degrees C annealed ITZO-based NVM device showed a retention exceeding similar to 94% of the threshold voltage shift after 10(4) s and greater than similar to 90% after 10 years with a low operating voltage of +11 V at only 1 mu s programming duration time. Therefore, the NVM devices, which were fabricated by the low ITZO/insulator interface trap densities, were highly suitable for potential application in memory systems.

• 出版日期2015-7