摘要

This paper presents a fractional-N phase-locked loop based spread spectrum clock generator (SSCG) using a programmable linear frequency modulator. The SSCG provides a programmable frequency deviation and modulation frequency regardless of its operating frequency. The ranges of frequency-deviation ratio and modulation frequency are 0-80% and 0-100 kHz with 610 Hz step resolution. The proposed SSCG successfully support five serial-link standards by using a single SSCG, and can be applied to various switching circuits such as class-D power amplifiers or switching power converters. The EMI reduction was measured to be 10.24-13.94 dB under 100-kHz resolution bandwidth. The proposed SSCG was fabricated using a 0.13-mu m CMOS process with an active area of 0.11 mm(2), while consuming an overall power of 6.28 mW at 1 GHz.

  • 出版日期2015-12