A 4.6-GHz low-phase-noise differential common-gate Clapp VCO with simplified common-mode biasing

作者：Din Amad Ud; Tai Nghia Nguyen; Huu Nhan Phan; Khac Vu Nguyen; Lee Jong Wook^*

来源：Microwave and Optical Technology Letters, 2017, 59(7): 1676-1680.

DOI：10.1002/mop.30602

• Clapp
• CMOS
• phase noise
• VCO

We present a new differential Clapp voltage-controlled oscillator (VCO) suitable for low-voltage scaled-down CMOS technology. For loss compensation, the Clapp VCO uses a common-gate topology that provides higher transconductance than that of the conventional common-drain configuration. To provide reliable start-up condition for the Clapp VCO, a small inductor is added at the gate of a transistor in the common-gate configuration. The new configuration also simplifies DC biasing while providing a suitable common-mode point for varactor tuning. All of these features allow the Clapp VCO to operate under low-voltage and low-power conditions. The fabricated Clapp VCO using 0.18-m RFCMOS achieves an excellent phase noise performance of -121 dBc/Hz at a 1 MHz offset from 4.6 GHz. Under a supply voltage of 1.0 V and a power consumption of 4.2 mW, the figure-of-merit (FOM) is -188 dBc/Hz.

• 出版日期2017-7