A low-voltage CMOS MIN circuit with 3N+1 complexity and 10 mV/10 ns corner error

作者：Molinar Solis Jesus E^*; Muniz Montero Carlos; Garcia Lozano Rodolfo Z; Hidalgo Cortes Cuauhtemoc; Sanchez Gaspariano Luis A; Rocha Perez Jose M; Diaz Sanchez Alejandro; Sosa Jesus Efrain Gaxiola

来源：IEICE Electronics Express, 2013, 10(22): 20130755.

DOI：10.1587/elex.10.20130755

• low complexity LTA
• low voltage LTA
• LTA filters

An 1.5 V CMOS voltage-mode MIN circuit with 3N + 1 complexity and 10 mV/10 ns corner error is presented. The proposed approach uses a low impedance configuration to operate with low voltage supply requirements and without the need of low-voltage techniques with large area requirements. The basic cell and a LTA circuit prototype were simulated, fabricated and characterized using a double poly, three metal layers 0.5 mu m CMOS technology from ON SEMI foundry.

• 出版日期2013