A New Unified Modular Adder/Subtractor for Arbitrary Moduli

作者:Tay Thian Fatt*; Chang Chip Hong
来源:IEEE International Symposium on Circuits and Systems (ISCAS), 2015-05-24 to 2015-05-27.

摘要

Efficient modular adders and subtractors for arbitrary moduli are key booster of computational speed for high-cardinality Residue Number Systems as they rely on arbitrary moduli set to expand the dynamic range. This paper proposes a new unified modular adder/subtractor that possesses a regular structure for any modulus. Compared to the latest modular adder/subtractor, which works for modulus in the forms of 2(n)+/- k, the proposed design is on average 10.81% faster and consumes 15.85% less hardware area and 2.51% lower power for n ranging from 4 to 8.

  • 出版日期2015
  • 单位南阳理工学院