A dual-mode reconfigurable GPS/BDS radio frequency front-end receiver in 0.18 μm CMOS process

作者：Jiang Jinguang; Tang Yanan; Zhou Xifeng; Liu Jianghua

来源：Journal of National University of Defense Technology, 2016, 38(3): 19-24.

DOI：10.11887/j.cn.201603004

• Auto-calibrating
• Dual modes
• Frequency tuning range
• Intermediate frequency filters
• Low intermediate frequency architecture
• Phase noise performance
• Radio frequency front end
• Reconfigurable

A dual-mode reconfigurable GPS L1/BDS B1 radio frequency front-end adopting low intermediate frequency architecture was realized in 0.18μm CMOS process. An auto-calibrating circuit was used to adjust the intermediate frequency filter's time constant and to reduce frequency uncertainty. A 4-bits capacitors array was designed to widen the frequency tuning range of the voltage controlled oscillator and to improve phase noise performance. The system power consumption was reduced by hardware reuse technique. Test results show that the power consumption is 37.8mW with 1.8V voltage supply, and the voltage gain is 103dB, while the noise figures are less than 3.2dB in both GPS L1 and BDS B1.

• 出版日期2016