A quantization noise pushing technique for Delta Sigma fractional-N frequency synthesizers

作者：Yang Yu Che^*; Lu Shey Shi

来源：IEEE Transactions on Microwave Theory and Techniques, 2008, 56(4): 817-825.

DOI：10.1109/TMTT.2008.918166

• Delta Sigma
• fractional-N
• frequency synthesizer
• phase-locked loop (PLL)
• quantization noise

This paper demonstrates our proposed quantization noise pushing technique, which moves the quantization noise to higher frequencies and utilizes the low-pass characteristic of the phased-lock loop (PLL) to further suppress the quantization noise. In addition, it can separate the operating frequency of the Delta Sigma modulator and the comparison frequency of the phase/frequency detector (PFD) so as to reduce the loop gain of the PLL and lower the in-band phase noise. This synthesizer was fabricated using the UNIC 0.18-mu m CMOS process. The chip area measures 0.85 mm(2). The supply voltage is 2 V, corresponding to a total power consumption of 26.8 mW. The experimental results show that, with this technique, the in-band phase noise can be lowered by 12 dB, while the out-of-band phase noise can be reduced by more than 15 dB, compared to a synthesizer with the same PFD comparison frequency.

• 出版日期2008-4
• 单位中国科学院电工研究所