Hybrid System Level Modeling and Implementation of Configurable Processor for SoC

作者：Guo Wei^*; Wei Jizeng; Ma Zijiao; Wang Zhenghua; Liu Zhuangli

来源：Chinese Journal of Electronics, 2010, 19(2): 237-240.

• System level modeling
• Configurable processor
• Transport triggered architecture

To cope with the roaring complexity of modern SoC designs, system level modeling and simulation are recognized as a must to fulfill quick architecture exploration and hardware/software co-verification. A hybrid system level modeling method for configurable processor based on Transport triggered architecture (TTA) is presented in this paper. We implemented a cycle-accurate and bit-accurate model at instruction set simulation level using SystemC to achieve fast simulation and a transaction level model for standard IP interface for easy SoC integration. The object oriented modeling technique was used to cope with the change of the architecture configuration. As a case study, an enhanced TTA-like processor, Tcore, was designed and plugged into a SoC for system simulation.

• 出版日期2010-4
• 单位天津大学