A yield-driven gridless router

作者：Zhou Qiang^*; Cai Yi Ci; Li Duo; Hong Xian Long

来源：Journal of Computer Science and Technology, 2007, 22(5): 653-660.

DOI：10.1007/s11390-007-9092-9

• design for yield
• critical area
• gridless routing
• integrated circuit layout

A new gridless router to improve the yield of IC layout is presented. The improvement of yield is achieved by reducing the critical areas where the circuit failures are likely to happen. This gridless area router benefits from a novel cost function to compute critical areas during routing process, and heuristically lays the patterns on the chip area where it is less possible to induce critical area. The router also takes other objectives into consideration, such as routing completion rate and nets length. It takes advantage of gridless routing to gain more flexibility and a higher completion rate. The experimental results show that critical areas are effectively decreased by 21% on average while maintaining the routing completion rate over 99%.

• 出版日期2007-9
• 单位清华大学