A Fast-Settling Three-Stage Amplifier Using Regular Miller Plus Reversed Indirect Compensation

作者：Song, Cheng; Zhu, Zhangming^*; Yang, Yintang

来源：Circuits, Systems, and Signal Processing, 2017, 36(2): 795-810.

DOI：10.1007/s00034-016-0314-7

• Three-stage amplifier
• Switched capacitor
• Miller compensation
• Fast settling

A novel frequency compensation technique, named Regular Miller plus Reversed Indirect Compensation (RMRIC), is presented in this paper for fast-settling three-stage amplifiers. The RMRIC topology includes, on the one hand, a Miller capacitor combined with one nulling resistor connected between the first stage and the third stage, and on the other hand, an indirect compensation capacitor in series with a resistor added between the first and the second stage, which improves remarkably the performance such as gain-bandwidth product (GBW) and sensitivity of the proposed amplifier. Detailed design considerations are carried out to demonstrate the stability of the compensation technique. Circuit simulation results show the amplifier driving a 2-pF load capacitance achieves a 9.25-GHz GBW dissipating only 16.5 mW with a 1.2 V supply voltage using a TSMC 65 nm CMOS technology, which shows a significant improvement in figure of merits. The implemented amplifier reaches a settling time of 3.35 ns with 0.006 % accuracy.

• 出版日期2017-2
• 单位西安电子科技大学